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 Obsolescence Notice
This product is obsolete. This information is available for your convenience only. For more information on Zarlink's obsolete products and replacement product lists, please visit
http://products.zarlink.com/obsolete_products/
JULY 1994
3028-2.1
SP1648
ECL OSCILLATOR
The SP1648 is an emitter-coupled oscillator, constructed on a single monolithic silicon chip. Output levels are compatible with ECL III logic levels. The oscillator requires an external parallel tank circuit consisting of an inductor (L) and capacitor (C). A varactor diode may be incorporated into the tank circuit to provide a voltage variable input for the oscillator (VCO). The device may also be used in phase locked loops and many other applications requiring a fixed or variable frequency clock source of high spectral purity. The SP1648 may be operated from a +5.0V dc supply or a -5.2V dc supply, depending upon system requirements.
TANK V CC 2 V CC 1 OUTPUT
1 2 3 4
8 7 6 5
BIAS POINT V EE 2 V EE 1 AGC
SP1648
Operating temperature range: 0C to +75C (Plastic)
Supply voltage +5.0V dc -5.2V dc GND PINS 6,7 2,3 SUPPLY PINS 2,3 6,7
MP8
Fig.1 Pin connections (not to scale) - top view
ORDERING INFORMATION
SP1648 MP (Industrial - Miniature Plastic Package)
ABSOLUTE MAXIMUM RATINGS
Power supply voltage VCC - VEE +8.0V Output source current<40mA AGC input VCC to VEE Storage temperature range-55C to +150C (Plastic) Operating junction temperature MP<150C
ELECTRICAL CHARACTERISTICS
SP1648
TEST VOLTAGE/CURRENT Volts Test temp. VIH Max. +1.960 +1.800 +1.680 VIL Min. +1.410 +1.300 +1.180 VCC 5.0 5.0 5.0 mAdc IL 5.0 5.0 5.0 VEE (Gnd)
Supply Voltage:
+5.0V
SP1648 Test Limits Pin under test -30C Min. Max. Min. +25C Max. Min. +85C
-30C +25C +85C
Characteristic
Symbol
Unit Max.
TEST VOLTAGE/CURRENT APPLIED TO PINS LISTED BELOW VIH Max. VIL Max. 1 VCC 2,3 2,3 2,3 2,3 IL 3 3 -
Power supply drain current Logic `1' output voltage Logic'0' output voltage Bias voltage
IE VOH VOL Vbias*
7 4 4 8
3.94 3.16 1.51 Min. Typ. -
4.18 3.40 1.86 Max. -
4.04 3.20 1.40 Min. 200 Typ. 500 50 225
40 4.25 3.43 1.70 Max. -
4.11 3.23 1.28 Min Typ. -
4.36 3.46 1.58 Max. -
mAdc Vdc Vdc Vdc
1 -
6,7 6,7 6,7 6,7
Peak-to-peak tank voltage Output duty cycle Oscillation frequency
Vp-p VDC fmax
1 4 -
-
mV % MHz
see Fig.4 see Fig.4 see Fig.4
-
2,3 2,3 2,3
3 3 3
6,7 6,7 6,7
TEST VOLTAGE/CURRENT
Thermal Characteristics: MP8 Supply Voltage:
Volts Test temp. -30C +25C +85C +85C Unit Min. Max. Min. Max. Min. Max. VIH Max. -3.240 -3.400 -3.520 VIL Min. -3.790 -3.900 -4.020 VCC 5.2 5.2 5.2
mAdc IL 5.0 5.0 5.0 VEE (Gnd)
JA = 163C/W JC = 57C/W
-5.2V
SP1648 Test Limits Pin under test -30C +25C
Characteristic
Symbol
TEST VOLTAGE/CURRENT APPLIED TO PINS LISTED BELOW VIH Max. VIL Max. 1 VCC 6,7 6,7 6,7 6,7 IL 3 3 -
Power supply drain current Logic `1' output voltage Logic'0' output voltage Bias voltage
IE VOH VOL Vbias*
7 4 4 8
1.045 -1.890 -3.690 Min. Typ. -
-0.815 -1.650 -3.340 Max. -
-0.960 -1.850 -3.800 Min. 200 Typ. 500 50 225
41 -0.750 -1.620 -3.500 Max. -
-0.890 -1.830 -3.920 Min Typ. -
-0.650 -1.575 -3.620 Max. -
mAdc Vdc Vdc Vdc
1 -
2,3 2,3 2,3 2,3
Peak-to-peak tank voltage Output duty cycle Oscillation frequency
Vp-p VDC fmax
1 4 -
-
mV % MHz
see Fig.4 see Fig.4 see Fig.4
-
6,7 6,7 6,7
3 3 3
2,3 2,3 2,3
SP1648
Fig.3 Spectral purity of signal at output
OPERATING CHARACTERISTICS
Fig.2 illustrates the circuit schematic for the SP1648. The oscillator incorporates positive feedback by coupling the base of transistor TR7 to the collector of TR8. An automatic gain control (AGC) is incorporated to limit the current through the emitter-coupled pair of transistors (TR7 and TR8) and allow optimum frequency response of the oscillator. In order to maintain the high Q of the oscillator, and provide high spectral purity at the output, a cascode transistor (TR4) is used to translate from the emitter follower (TR5) to the output differential pair TR2 and TR3. TR2 and TR3, in conjunction with output transistor TR1, provide a highly buffered output which produces a square wave. Transistors TR10 through TR14 provide this bias drive for the oscillator and output buffer. Fig.3 indicates the high spectral purity of the oscillator output.
Fig.4 Test circuit and waveforms
SP1648
When operating the oscillator in the voltage controlled mode (Fig.5), it should be noted that the cathode of the varactor diode, (D) should be biased at least 2VBE above VEE (1.4v for positive supply operation). When the SP1648 is used with a constant dc voltage to the varactor diode, the output frequency will vary slightly because of internal noise. This variation is plotted versus operating frequency in Fig.6. Typical transfer characteristics for the oscillator in the voltage controlled mode are shown in Figs.7, 8 and 9. Figs.7 and 9 show transfer characteristics employing only the capacitance of the varactor diode (plus the input capacitance of the oscillator, 6pF typical). Fig.8 illustrates the oscillator operating in a voltage controlled mode with the output frequency range limited. This is achieved by adding a capacitor in parallel with the tank circuit as shown. The 1k resistor in Figs.7 and 8 is used to protect the varactor diode during testing. It is not necessary as long as the dc input voltage does not cause the diode to become forward biased. The larger-valued resistor (51k) in Fig.9 is required to provide isolation for the high-impedance junctions of the two varactor diodes. The tuning range of the oscillator in the voltage controlled mode may be calculated as: fmax fmin where fmin = = CD (max) + CS CD (min) + CS
Fig.5 The SP1648 operating in the voltage-controlled mode
CS = shunt capacitance (input plus external capacitance). CD = varactor capacitance as a function of bias voltage. Good RF and low-frequency by-passing is necessary on the power supply pins (see Fig.3). Capacitors (C1 and C2 of Fig.5) should be used to bypass the AGC point and the VCO input (varactor diode), guaranteeing only dc levels at these points.
1 2 L(CD (max) + CS)
Fig.6 Frequency deviation test circuit
SP1648
Fig.7
Fig.8
Fig.9
SP1648
For output frequency operation between 1MHz and 50MHz a 0.1F capacitor is sufficient for C1 and C2. At higher frequencies, smaller values of capacitance should be used; at lower frequencies, larger values of capacitance. At higher frequencies the value of bypass capacitors depends directly upon the physical layout of the system. All bypassing should be as close to the package pins as possible to minimise unwanted lead inductance. The peak-to-peak swing of the tank circuit is set internally by the AGC circuitry. Since voltage swing of the tank circuit provides the drive for the output buffer, the AGC potential directly affects the output waveform. If it is desired to have a sine wave at the output of the SP1648, a series resistor is tied from the AGC point to the most negative power potential (ground if +5.0V supply is used, -5.2V if a negative supply is used). At frequencies above 100MHz typ. it may be necessary to increase the tank circuit peak-to-peak voltage in order to maintain a square wave at the output of the SP1648. This is accomplished by attaching a series resistor (1k minimum) from the AGC to the most positive power potential (+5.0V if a +5.0V supply is used, ground if a -5.2V supply is used).
HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire, United Kingdom. SN2 2QW Tel: (01793) 518000 Fax: (01793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017, 1500 Green Hills Road, Scotts Valley, California 95067-0017, United States of America. Tel (408) 438 2900 Fax: (408) 438 5576
CUSTOMER SERVICE CENTRES * FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax: (1) 64 46 06 07 * GERMANY Munich Tel: (089) 3609 06-0 Fax: (089) 3609 06-55 * ITALY Milan Tel: (02) 66040867 Fax: (02)66040993 * JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510 * NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023 * SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 * SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 * TAIWAN, ROC Taipei Tel: 886 2 5461260 Fax: 886 2 7190260 * UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (01793) 518510 Fax: (01793) 518582 These are supported by Agents and Distributors in major countries world-wide. (c) GEC Plessey Semiconductors 1994 Publication No. 3028 Issue No. 2.1 July 1994 TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRINTED IN UNITED KINGDOM
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The


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